The best time to make chips is now.

Write Verilog, run synthesis, and take a real design to tape-out, all from a browser tab. Chip design has been gatekept for decades. Not anymore.

Free to start / No install / No licence

Backed by

University of Bristol Centre for InnovationBasecamp Enterprise TeamRunway

From idea to silicon, the fast and easy way

Browser IDE

IDE

Write Verilog in the browser, with linting, autosave, and an AI assistant on hand.

Analysis

Analyse

Inspect timing, power, and area, with lint and DRC/LVS signoff, so you catch problems long before tape-out.

GDS layout

GDS

Push through the LibreLane flow to a real GDS layout, signed off on timing, power, and area.

Learning path

Guided, hands-on learning paths

Go from your first logic gate to a full chip with structured courses built on real tooling. Mentorship and projects designed to make you genuinely industry-ready.

  • Step-by-step Verilog to tape-out paths
  • Practice on the same tools engineers use
  • Build a portfolio of real designs
Explore courses
Circuit Lab

Design and simulate real circuits

Sketch analog and digital circuits on a browser canvas and run simulations instantly. No setup and no licences, just a schematic and a simulator.

  • Sketch schematics in the browser
  • Turn photos into schematics with AI
  • Visualise results as you go
Open the Circuit Lab
Vulkos Assistant

An assistant that knows chip design

Generate LibreLane configs and testbenches, explain errors, and fix them in place. The assistant is built into the workspace and understands the whole flow.

  • Generate configs and testbenches
  • Explain and fix flow errors inline
  • Apply changes straight to your files
Meet the assistant

Whether you are learning or hiring.

Learn chip design, properly

Turn a theoretical background into real, industry-ready skill. Structured paths, the actual toolchain, and projects that move you from the lecture hall to the work that matters.

  • Guided Verilog to tape-out paths
  • Real EDA tools, zero setup
  • A portfolio of real designs
Join the waitlist

Build your talent pipeline

Secure your supply of next-generation engineers. Partner with Vulkos to shape curriculum, spot vetted talent early, and cut the recruitment friction holding your team back.

  • Shape the curriculum
  • Spot vetted talent early
  • Onboard faster, hire smarter
Partner with us

Built for learners. Trusted by the people who hire them.

I’ve learnt more about digital design using Vulkos in one week than in three months at uni.
Graduate
Verified Vulkos user
It’s like Duolingo for semiconductors!
Senior Hiring Manager
Verified Vulkos user
If someone came to an interview having used Vulkos, I’d be much more likely to hire them.
Senior Engineer
Verified Vulkos user

Simple plans. Serious silicon.

Start free, scale when your designs do. Every plan includes the browser IDE, learning tools, and open-source toolchain, with no install required.

Free

Learn and prototype at your own pace.

$0forever
  • 5 projects
  • Weekly AI assistant messages
  • Browser IDE + Circuit Lab
  • Core learning paths
Join the waitlist

Pro

Popular

For builders shipping real designs every week.

$29per seat / month
  • Unlimited projects
  • More AI messages + compute
  • Full learning catalog
  • 1 year of run history
Start Pro trial

Enterprise

For teams, universities, and production flows.

Customannual billing
  • Everything in Pro
  • SSO / SAML + SLA
  • On-prem / VPC option
  • Dedicated support
Contact sales

Need the full breakdown? Compare every plan.

Questions, answered.

No. Vulkos runs entirely in the browser. The editor, simulator, and synthesis flow are all hosted, so there is no toolchain to install and no EDA licence to buy.

No. Our learning paths start from the fundamentals of digital logic and Verilog, then build up to running real synthesis. Regardless of your experience, start building your first chip today.

Real digital designs, from a simple counter to more complex logic, written in Verilog, simulated, and pushed through the open-source LibreLane flow to a GDS layout on the sky130 PDK.

Yes. The Free plan is free forever and includes the browser IDE, the Circuit Lab, core learning paths, and a weekly allowance of AI assistant messages and compute time.

Both. Learners use Vulkos to build industry-ready skills, and engineering teams and universities partner with us to train and source next-generation talent.

Industry-standard, open-source tooling: Verilog, simulation, and the LibreLane flow with the sky130 open PDK, so what you learn maps directly to real engineering work.

Early access

Join the waitlist.

Vulkos is in private beta. Drop your email and we will let you know the moment you can start designing chips in the browser.

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